The tool provides simulation support for latest standards of SystemC, SystemVerilog, Verilog 2001 standard and VHDL. QuestaSim is part of the Questa Advanced Functional Verification Platform and is the latest tool in Mentor Graphics tool suite for Functional Verification. – Code Coverage Adaptive Exclusions SupportĪbout QuestaSim. – Questa Fast Dumping (QFD) support for SAIF, TCL, UVM backdoor – Improved Gate Level performance and delay model support – Improved profiling and capacity reporting, capstats tools – Improved SystemVerilog/Verilog/VHDL performance and optimizations Mentor, a Siemens business, has unveiled QuestaSim 10.6c, is part of the Questa Advanced Functional Verification Platform and is the latest tool in Mentor Graphics tool suite for Functional Verification.
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